1. Field of the Invention
One of the inventions relates to an improvement in the structure of a non-volatile semiconductor memory device having a Virtual Ground Array structure (first to fifth embodiments). Furthermore, another one of the inventions relates to an improvement of a CMOS compatible non-volatile semiconductor memory device (sixth to thirteenth embodiments).
2. Description of the Related Art
FIG. 1(A) and FIG. 1(B) show the diagrams of equivalent circuits of a general NOR array structure and a virtual ground array structure. In the virtual ground array structure, since one bit line is shared by two adjacent memory cell transistors, isolations of memory cells and contacts can be removed, therefore, the structure becomes simpler and the area of a cell becomes smaller. The structure of a virtual ground array is receiving attention as a future technology of a NOR type flash memory as cited, for example, in pp 204-205 of IEEE, Symposium on VLSI Technology Digest of Technical Papers, 2005.
On the other hand, the Applicants of the present invention have developed a technology of B4-HE (back bias assisted band-to-band tunneling induced hot electron) injection mechanism which dramatically improved the program speed of a flash memory, as shown in FIG. 2. In the B4-HE injection mechanism, current consumption during programming is reduced and the number of cells which can be simultaneously programmed increases by injecting hot electrons into charge storage layers by BTBT (band-to-band tunneling) while the back gate voltage is applied. This is described in Japanese Patent Publication 2006-156925 (US counterpart: 20070230251A1).
B4-HE injection technology is a method in which programming is performed by applying a predetermined voltage to a gate electrode, N type well and a bit line (drain). When B4-HE injection technology is applied to a virtual ground array structure, a bit line is shared between adjacent memory cells on the same row in the virtual ground memory cell array. As a result, as is shown in FIG. 3, in B4-HE injection technology, the application of a programming voltage to a selected cell 51 is done with the same conditions to the adjacent non-selected memory cell 52 which shares the same bit line which is applied with the predetermined voltage (0V) and thus is programmed at the same as the selected cell 51. Therefore, the above mentioned B4-HE injection technology can not be applied as it is to a virtual ground array structure.
One of the present inventions provides a non-volatile semiconductor memory device having a virtual ground array in which B4-HE injection technology is applied so that a non-selected cell which is adjacent to a selected cell is not programmed. Furthermore, the present invention proposes a manufacturing method thereof. These inventions are supported by the first to fifth embodiments.
Another aspect of the present inventions provides a CMOS compatible non-volatile semiconductor memory device which has better performance than the devices disclosed in U.S. Pat. Nos. 6,518,614, 7,248,507 and in US patent published application No. 2003-222,303 A1. This aspect is supported by the sixth to thirteenth embodiments.